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Hands-On ZYNQ: Mastering AXI4 Bus Protocol

Create Verilog and C codes for implementing the AXI4 bus protocol on ZYNQ FPGA
4.4
4.4/5
(96 reviews)
702 students
Created by

8.5

Classbaze Grade®

7.2

Freshness

8.6

Popularity

9.0

Material

Create Verilog and C codes for implementing the AXI4 bus protocol on ZYNQ FPGA
Platform: Udemy
Video: 3h 35m
Language: English
Next start: On Demand

Best Zynq FPGA classes:

Classbaze Rating

Classbaze Grade®

8.5 / 10

CourseMarks Score® helps students to find the best classes. We aggregate 18 factors, including freshness, student feedback and content diversity.

Freshness

7.2 / 10
This course was last updated on 1/2020.

Course content can become outdated quite quickly. After analysing 71,530 courses, we found that the highest rated courses are updated every year. If a course has not been updated for more than 2 years, you should carefully evaluate the course before enrolling.

Popularity

8.6 / 10
We analyzed factors such as the rating (4.4/5) and the ratio between the number of reviews and the number of students, which is a great signal of student commitment.

New courses are hard to evaluate because there are no or just a few student ratings, but Student Feedback Score helps you find great courses even with fewer reviews.

Material

9.0 / 10
Video Score: 8.1 / 10
The course includes 3h 35m video content. Courses with more videos usually have a higher average rating. We have found that the sweet spot is 16 hours of video, which is long enough to teach a topic comprehensively, but not overwhelming. Courses over 16 hours of video gets the maximum score.
The average video length is 7 hours 55 minutes of 6 Zynq FPGA courses on Udemy.
Detail Score: 9.0 / 10

The top online course contains a detailed description of the course, what you will learn and also a detailed description about the instructor.

Extra Content Score: 9.9 / 10

Tests, exercises, articles and other resources help students to better understand and deepen their understanding of the topic.

This course contains:

3 articles.
10 resources.
0 exercise.
0 test.

In this page

About the course

Note: Take this course if you want save money in training costs of similar contents. The Official Xilinx Traning Courses cost typically from 600 USD to 4000 USD. This course is not only teaches the Zynq Processing System (PS) but also the Programmable Logic (FPGA), and the interface between them.

Published (20 Apr 2019): The GCD accelerator and UART sections will be added later, and the course price will be increased, when those sections are added.
Update 1 (22 Apr 2019): English Subtitles/CCs are enabled for this course
Update 2 (02 Jan 2020): Add bonus lecture.

What is AXI?
Advanced eXtensible Interface (AXI) is an industry-standard, system bus for the connection between CPU and peripheral in System-on-Chip (SoC) design. Today AXI version 4 (AXI4) is used in many SoC that use ARM Cortex-A processors, such as Qualcomm Snapdragon, Samsung Exynos, Broadcom (used on Raspberry Pi), and many more.
What is ZYNQ?
ZYNQ is actually a SoC, not just a FPGA, because ZYNQ consists of hard processor system (ARM Cortex-A9) and programmable logic (Xilinx 7-series FPGA, equivalent to Artix-7 FPGA). The ZYNQ device enables the implementation of custom logic such as hardware accelerator in combination with software that runs on the ARM Cortex-A9. ZYNQ can also run Linux OS, which makes this device like the popular Raspberry Pi, but with FPGA inside.

This course is based on hands-on laboratory with a lot of examples. Sample codes are provided for every project in this courses.
You will receive a certificate of completion when finishing this course. There is also Udemy 30 Day Money Back Guarantee, if you are not satisfied with this course.

So, click the course button and see you inside the course.

What can you learn from this course?

✓ Use Xilinx AXI4-based IP Cores
✓ Create your own AXI4-based IP Cores from scratch
✓ Create an AXI4-based Hardware Accelerator IP Core (GCD case study)
✓ Create an AXI4-based Transceiver IP Core (UART case study)

What you need to start the course?

• Basics of Digital Systems
• HDL (Verilog) and C/C++ programming experience
• Vivado WebPACK (free) Edition 2016.04 (recommended) or higher
• A ZYBO development board (or other ZYNQ boards)

Who is this course is made for?

• Students or engineers who are working in Embedded or SoC design
• Students or engineers who have a knowledge of HDL (Verilog) and C/C++ but new to AXI4 bus protocol
• Students or engineers who are already using ZYNQ and want to create your own IP cores with AXI4 bus protocol

Are there coupons or discounts for Hands-On ZYNQ: Mastering AXI4 Bus Protocol ? What is the current price?

The course costs $14.99. And currently there is a 82% discount on the original price of the course, which was $84.99. So you save $70 if you enroll the course now.
The average price is $15.0 of 6 Zynq FPGA courses. So this course is 0% cheaper than the average Zynq FPGA course on Udemy.

Will I be refunded if I'm not satisfied with the Hands-On ZYNQ: Mastering AXI4 Bus Protocol course?

YES, Hands-On ZYNQ: Mastering AXI4 Bus Protocol has a 30-day money back guarantee. The 30-day refund policy is designed to allow students to study without risk.

Are there any financial aid for this course?

Currently we could not find a scholarship for the Hands-On ZYNQ: Mastering AXI4 Bus Protocol course, but there is a $70 discount from the original price ($84.99). So the current price is just $14.99.

Who will teach this course? Can I trust Erwin Ouyang?

Erwin Ouyang has created 4 courses that got 282 reviews which are generally positive. Erwin Ouyang has taught 8,925 students and received a 3.9 average review out of 282 reviews. Depending on the information available, we think that Erwin Ouyang is an instructor that you can trust.
R&D Engineer, Researcher (8000+ students)
He is an enthusiast in Microcontroller and FPGA with over 8000+ students on Udemy.
He worked as an R&D Engineer. He developed firmware and software for digital nurse call system and door access control system with AVR ATmega and .NET framework. He developed software for interfacing between medical laboratory equipment and laboratory information system based on RS-232 and TCP/IP.
He received his MSc degree in Electrical Engineering in 2018 from ITB. He is currently a researcher at Microelectronics Center of ITB. His research interests are in IoT, wireless communication, blockchain, and machine learning.
He writes articles and tutorials in his blogs: klinikarduino[dot]github[dot]io.
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8.5

Classbaze Grade®

7.2

Freshness

8.6

Popularity

9.0

Material

Platform: Udemy
Video: 3h 35m
Language: English
Next start: On Demand

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